{ "id": "epew29rv77", "slug": "next-generation-lithography", "title": "Next-generation lithography", "updated": "2026-10-15", "topic_path": [ { "id": "technology", "label": "Technology and the built world", "api_url": "https://www.edgepedia.org/api/v1/topics/technology" }, { "id": "technology.engineering", "label": "Engineering and manufacturing", "api_url": "https://www.edgepedia.org/api/v1/topics/technology.engineering" }, { "id": "technology.engineering.manufacturing.processes", "label": "Manufacturing processes and fabrication", "api_url": "https://www.edgepedia.org/api/v1/topics/technology.engineering.manufacturing.processes" } ], "geo": [ { "id": "geo.nongeo.t1946.technology.engineering.manufacturing.processes", "label": "Non-geographic · 1946 to 2000: Manufacturing processes and fabrication", "api_url": "https://www.edgepedia.org/api/v1/geo/geo.nongeo.t1946.technology.engineering.manufacturing.processes", "path": [ { "id": "geo.nongeo", "label": "Non-geographic", "api_url": "https://www.edgepedia.org/api/v1/geo/geo.nongeo" }, { "id": "geo.nongeo.t1946", "label": "Non-geographic · 1946 to 2000", "api_url": "https://www.edgepedia.org/api/v1/geo/geo.nongeo.t1946" }, { "id": "geo.nongeo.t1946.technology", "label": "Technology and the built world", "api_url": "https://www.edgepedia.org/api/v1/geo/geo.nongeo.t1946.technology" }, { "id": "geo.nongeo.t1946.technology.engineering", "label": "Engineering and manufacturing", "api_url": "https://www.edgepedia.org/api/v1/geo/geo.nongeo.t1946.technology.engineering" }, { "id": "geo.nongeo.t1946.technology.engineering.manufacturing.processes", "label": "Manufacturing processes and fabrication", "api_url": "https://www.edgepedia.org/api/v1/geo/geo.nongeo.t1946.technology.engineering.manufacturing.processes" } ] }, { "id": "geo.nongeo.t2001.technology.engineering.manufacturing.processes", "label": "Non-geographic · 2001 to 2020: Manufacturing processes and fabrication", "api_url": "https://www.edgepedia.org/api/v1/geo/geo.nongeo.t2001.technology.engineering.manufacturing.processes", "path": [ { "id": "geo.nongeo", "label": "Non-geographic", "api_url": "https://www.edgepedia.org/api/v1/geo/geo.nongeo" }, { "id": "geo.nongeo.t2001", "label": "Non-geographic · 2001 to 2020", "api_url": "https://www.edgepedia.org/api/v1/geo/geo.nongeo.t2001" }, { "id": "geo.nongeo.t2001.technology", "label": "Technology and the built world", "api_url": "https://www.edgepedia.org/api/v1/geo/geo.nongeo.t2001.technology" }, { "id": "geo.nongeo.t2001.technology.engineering", "label": "Engineering and manufacturing", "api_url": "https://www.edgepedia.org/api/v1/geo/geo.nongeo.t2001.technology.engineering" }, { "id": "geo.nongeo.t2001.technology.engineering.manufacturing.processes", "label": "Manufacturing processes and fabrication", "api_url": "https://www.edgepedia.org/api/v1/geo/geo.nongeo.t2001.technology.engineering.manufacturing.processes" } ] } ], "excerpt": "Next-generation lithography (NGL) is the family of patterning technologies developed to succeed optical lithography in making nanoscale chips; EUV lithography at 13.5 nm is the adopted leading-edge technique.", "snippet": "Next-generation lithography (NGL) is the family of patterning technologies developed to succeed optical lithography in making nanoscale chips; EUV lithography at 13.5 nm is the adopted leading-edge technique.", "node": "technology.engineering.manufacturing.processes", "markdown": "# Next-generation lithography\n\nNext-generation lithography (NGL) is the family of patterning technologies developed to succeed conventional optical lithography in fabricating nanoscale integrated circuits. The main candidates are extreme ultraviolet (EUV) lithography, electron-beam lithography in projection and multi-beam forms, nanoimprint lithography, and [X-ray lithography](https://www.edgepedia.org/x-ray-lithography).[1](https://pmc.ncbi.nlm.nih.gov/articles/PMC11988993/) Of these, EUV, which prints with 13.5 nm light, has been adopted by the semiconductor industry as the leading-edge technique for continued miniaturization in line with [Moore's law](https://www.edgepedia.org/moores-law).[2](https://www.nature.com/articles/s43586-024-00361-z) Electron-beam and ion-beam systems deliver high-precision maskless patterning at low throughput, X-ray lithography reaches deep, high-resolution features, and nanoimprint replicates nanostructures at low cost and high throughput.[1](https://pmc.ncbi.nlm.nih.gov/articles/PMC11988993/)\n\n| Key fact | Detail |\n|---|---|\n| EUV wavelength | 13.5 nm, adopted because tin plasma sources emit efficiently there[3](https://iopscience.iop.org/article/10.1088/1361-6595/ab3302/meta) • [4](https://iopscience.iop.org/article/10.35848/1347-4065/ae4686) |\n| Resolution scaling | Minimum half-pitch = \\( k_{1} \\cdot \\lambda / \\mathrm{NA} \\); scaling proceeds via shorter wavelength, larger NA, or smaller \\( k_{1} \\)[5](https://proceedings.spiedigitallibrary.org/journals/journal-of-micro-nanopatterning-materials-and-metrology/volume-24/issue-1/011005/Challenges-and-limits-to-patterning-using-extreme-ultraviolet-lithography/10.1117/1.JMM.24.1.011005.full) |\n| 0.33 NA production tool (NXE:3800E) | 13 nm resolution, on-product overlay <1.5 nm, 220 wafers per hour with a 500 W source[6](https://www.jstage.jst.go.jp/article/photopolymer/38/4/38_263/_pdf) |\n| High-NA tool (0.55 NA) | 8 nm specified resolution; 26 mm × 16.5 mm field, half the 0.33 NA field[6](https://www.jstage.jst.go.jp/article/photopolymer/38/4/38_263/_pdf) • [7](https://irds.ieee.org/images/files/pdf/2024/2024IRDS_LITHO.pdf) |\n| First EUV consumer product | Samsung Galaxy Note10, 2019[8](https://www.asml.com/en/company/stories/2022/making-euv-lab-to-fab) |\n| Nanoimprint (Canon FPA-1200NZ2C) | 14 nm minimum linewidth, 26 mm × 33 mm field, overlay ≤ 4 nm[9](https://global.canon/en/product/indtech/semicon/fpa1200nz2c.html) |\n| Distinctive EUV defect class | Stochastic failures such as broken lines and bridged or missing contact holes, not typically seen in optical lithography[7](https://irds.ieee.org/images/files/pdf/2024/2024IRDS_LITHO.pdf) |\n\n## How it works\n\n[Optical resolution](https://www.edgepedia.org/optical-resolution) follows the Rayleigh relation, minimum half-pitch = \\( k_{1} \\cdot \\lambda / \\mathrm{NA} \\), so patterning smaller features requires a shorter wavelength \\( \\lambda \\), a larger numerical aperture (light-gathering angle of the lens system), or a smaller process factor \\( k_{1} \\).[5](https://proceedings.spiedigitallibrary.org/journals/journal-of-micro-nanopatterning-materials-and-metrology/volume-24/issue-1/011005/Challenges-and-limits-to-patterning-using-extreme-ultraviolet-lithography/10.1117/1.JMM.24.1.011005.full) EUV lithography uses a shorter wavelength than optical lithography, 13.5 nm.[2](https://www.nature.com/articles/s43586-024-00361-z) Because 13.5 nm light is absorbed by air and by glass, the exposure runs in vacuum and every optical element is a mirror rather than a lens.[10](https://cset.georgetown.edu/wp-content/uploads/CSET-Tracing-the-Emergence-of-Extreme-Ultraviolet-Lithography.pdf)\n\nThe light comes from a laser-produced plasma (LPP) source: a high-powered laser incinerates about 50,000 tin drops per second, each 30 micrometers across.[10](https://cset.georgetown.edu/wp-content/uploads/CSET-Tracing-the-Emergence-of-Extreme-Ultraviolet-Lithography.pdf) The 13.5 nm wavelength was adopted as the standard because tin plasma sources emit efficiently there, and the Mo/Si material pair, with its large refractive index contrast at 13.5 nm, serves as the reflective multilayer.[4](https://iopscience.iop.org/article/10.35848/1347-4065/ae4686) The photomask is likewise reflective: a low-thermal-expansion glass substrate carrying a reflective multilayer and an absorber layer that defines the circuit pattern.[2](https://www.nature.com/articles/s43586-024-00361-z)\n\n## How it is done\n\nIn the industrial source module, a laser prepulse hits a spherical liquid tin microdroplet and propels it into an extended disk-shaped target, which a main pulse then irradiates to create the highly ionized, EUV-emitting tin plasma; a multilayer mirror collects the in-band light toward the intermediate focus.[3](https://iopscience.iop.org/article/10.1088/1361-6595/ab3302/meta) The production-standard 0.33 NA NXE platform images 13 nm features over a 26 mm × 33 mm field.[6](https://www.jstage.jst.go.jp/article/photopolymer/38/4/38_263/_pdf) • [11](https://www.eetimes.com/intel-puts-high-na-euv-into-production-but-stitching-still-has-something-to-prove)\n\n[Electron-beam lithography](https://www.edgepedia.org/electron-beam-lithography) works differently: a focused beam writes patterns point by point, which gives exceptional resolution but is serial in nature, so practical tools use many beams in parallel or projection optics.[12](https://pmc.ncbi.nlm.nih.gov/articles/PMC12943502/) [Nanoimprint lithography](https://www.edgepedia.org/nanoimprint-lithography) (NIL) mechanically stamps the pattern: Canon's FPA-1200NZ2C presses a mask imprinted with the circuit pattern onto the resist like a stamp, giving a 14 nm minimum linewidth (5-nm-node equivalent) with a path to 10 nm through mask improvements, a 26 mm × 33 mm field, and overlay accuracy ≤ 4 nm, while consuming significantly less power than photolithography because it needs no special-wavelength light source.[9](https://global.canon/en/product/indtech/semicon/fpa1200nz2c.html)\n\n## Origin\n\nThe field grew out of soft X-ray imaging. Researchers in the United States began investigating whether soft X-rays could impart images in 1981, initially for X-ray microscopes and telescopes.[10](https://cset.georgetown.edu/wp-content/uploads/CSET-Tracing-the-Emergence-of-Extreme-Ultraviolet-Lithography.pdf) [Soft X-ray](https://www.edgepedia.org/soft-x-ray) reduction lithography using multilayer-coated Schwarzschild optics was demonstrated in 1986, a 0.5 µm pattern was delineated in 1989, and a diffraction-limited 0.05 µm pattern was demonstrated with Mo/Si multilayer Schwarzschild optics at 14 nm.[13](https://doi.org/10.1116/1.2127950) Per ASML's corporate history, Hiroo Kinoshita projected the first EUV images in the mid-1980s in Japan, building on 1970s Russian multilayer mirror research; Kinoshita later reviewed this history of EUV lithography in the Journal of Vacuum Science & Technology B in 2005.[8](https://www.asml.com/en/company/stories/2022/making-euv-lab-to-fab) • [13](https://doi.org/10.1116/1.2127950)\n\nThe term \"extreme ultraviolet lithography\" distances the field from failed X-ray proximity lithography.[10](https://cset.georgetown.edu/wp-content/uploads/CSET-Tracing-the-Emergence-of-Extreme-Ultraviolet-Lithography.pdf) The U.S. National EUV Lithography Program emerged in 1994 with LLNL, SNL, LBNL, and AT&T Bell Labs; the Intel-led EUV LLC formed in 1997, and Europe's EUCLIDES consortium, formed by ASML with ZEISS and [Oxford Instruments](https://www.edgepedia.org/oxford-instruments), began in 1998.[10](https://cset.georgetown.edu/wp-content/uploads/CSET-Tracing-the-Emergence-of-Extreme-Ultraviolet-Lithography.pdf) • [13](https://doi.org/10.1116/1.2127950) • [8](https://www.asml.com/en/company/stories/2022/making-euv-lab-to-fab) ASML's own 1997 NGL selection program evaluated electron beam projection, ion beam projection, and EUV, and by 2001 focused on EUV largely for its extendibility.[6](https://www.jstage.jst.go.jp/article/photopolymer/38/4/38_263/_pdf) ASML shipped full-field Alpha-demo scanners to imec and CNSE Albany in 2006, acquired source maker Cymer in 2013, and shipped the first production system, the TWINSCAN NXE:3300, in 2013.[8](https://www.asml.com/en/company/stories/2022/making-euv-lab-to-fab)\n\n## Variants\n\n**High-NA EUV** (0.55 NA) uses anamorphic optics with 8x reduction in the scan direction and 4x in the slit direction, giving a 26 mm × 16.5 mm field, half the current field, with throughput maintained by two passes; it is expected to enable roughly 16 nm minimum pitch in single patterning.[7](https://irds.ieee.org/images/files/pdf/2024/2024IRDS_LITHO.pdf) The 0.55 NA scanner concept for 8 nm lithography was published by Jan van Schoot and colleagues in 2017 in the Journal of Micro/[Nanolithography](https://www.edgepedia.org/nanolithography), MEMS, and MOEMS.[14](https://doi.org/10.1117/1.jmm.16.4.041010) **Hyper-NA** systems with NA ≥ 0.75 are under consideration for sub-16 nm pitches after 2035, and **Beyond-EUV** approaches at 6 to 7 nm wavelength are also assessed, though La/B multilayers with over 70% calculated reflectivity at 6.7 nm have an angular bandwidth of only 6 degrees, limiting NA to no more than 0.34 for 8x reduction.[7](https://irds.ieee.org/images/files/pdf/2024/2024IRDS_LITHO.pdf) • [5](https://proceedings.spiedigitallibrary.org/journals/journal-of-micro-nanopatterning-materials-and-metrology/volume-24/issue-1/011005/Challenges-and-limits-to-patterning-using-extreme-ultraviolet-lithography/10.1117/1.JMM.24.1.011005.full)\n\n**Electron-beam approaches** include projection schemes such as SCALPEL, in which 100 keV electrons illuminate a membrane mask and an aperture in the back-focal plane blocks strongly scattered electrons; imaging is aberration limited rather than diffraction limited, with an ultimate resolution near 35 nm and 4:1 demagnification.[15](https://proceedings.jacow.org/p99/PAPERS/FRBL1.PDF) Multi-beam maskless tools take the parallel route: Mapper [Lithography](https://www.edgepedia.org/lithography), a TU Delft spin-off founded in 2000, built the FLX-1200 with 66,248 parallel beams at 5 kV.[16](https://www.cea.fr/cea-tech/leti/english/Documents/Spie-Litho/03%20-%20ML2%20-%20MAPPER%20-%20M%20Wieland%20-%20LETI%20WS%20SPIE%202018.pdf) Multi-beam mask writers serve EUV mask making instead: [IMS Nanofabrication](https://www.edgepedia.org/ims-nanofabrication)'s MBMW-201, in use since 2019, writes masks for the 7 nm, 5 nm, and 3 nm nodes.[17](https://www.spiedigitallibrary.org/journals/journal-of-micro-nanopatterning-materials-and-metrology/volume-23/issue-1/011205/Multi-beam-mask-writing-opens-up-new-fields-of-application/10.1117/1.JMM.23.1.011205.pdf) Sub-10 nm imprint lithography was reported by Stephen Y. Chou and colleagues in 1997 in the Journal of Vacuum Science & Technology B.[18](https://doi.org/10.1116/1.589752)\n\n## Applications\n\nThe NXE:3800E, the latest 0.33 NA scanner, provides 13 nm resolution, on-product overlay improved from <1.7 nm to <1.5 nm, and productivity raised from 160 to 220 wafers per hour using a 500 W source.[6](https://www.jstage.jst.go.jp/article/photopolymer/38/4/38_263/_pdf) EUV entered high-volume manufacturing in logic and DRAM, and the first commercial product containing an EUV-made chip, Samsung's Galaxy Note10, reached the market in 2019.[6](https://www.jstage.jst.go.jp/article/photopolymer/38/4/38_263/_pdf) • [8](https://www.asml.com/en/company/stories/2022/making-euv-lab-to-fab)\n\nThe 8 nm specification of 0.55 NA tools allows single exposures with features 1.7 times smaller and transistor densities 2.9 times higher than 0.33 NA systems; first results showed 10 nm dense lines/spaces and 14 nm dense contacts.[6](https://www.jstage.jst.go.jp/article/photopolymer/38/4/38_263/_pdf) For DRAM 15 nm contact holes, replacing triple exposure (two 0.33 NA passes plus one DUV) with single-exposure 0.55 NA gives about a 30% patterning cost benefit, roughly 70% dose reduction, and about 7x throughput improvement.[19](https://euvlitho.com/2024/S1.pdf) High-NA tools began delivery to customers at the end of 2023, and by July 2026 [Intel Foundry](https://www.edgepedia.org/intel-foundry) was using [High NA EUV](https://www.edgepedia.org/high-na-euv) on [Intel 18A](https://www.edgepedia.org/intel-18a) to produce a subset of Core Ultra Series 3 (Panther Lake) processors, the industry's first high-volume logic product made with High NA; by September 2026 Intel reported more than one million wafers processed on High NA.[7](https://irds.ieee.org/images/files/pdf/2024/2024IRDS_LITHO.pdf) • [20](https://www.globenewswire.com/news-release/2026/07/15/3327453/0/en/High-NA-EUV-reaches-new-readiness-milestone-with-first-high-volume-Logic-product.html) • [21](https://www.intel.com/content/www/us/en/newsroom/news/intel-foundry/intel-foundry-asml-accelerate-industry-readiness-for-high-na-euv.html) TSMC intends to use High NA in high-volume manufacturing for advanced nodes starting in 2030, and in September 2026 ASML and TSMC announced an industry initiative targeting a 12-inch mask pilot line by 2031 and full lithography system readiness by 2033.[22](https://www.asml.com/en/news/press-releases/2026/tsmc-and-asml-announce-industry-transition-to-large-format-photomasks-for-high-na-euv) EUV interference lithography has been demonstrated at 5 nm resolution.[23](https://doi.org/10.1039/d4nr01332h)\n\n## Limitations and alternatives\n\n**Stochastic effects** are EUV's distinctive failure mode: broken lines, bridged contact holes, and missing contact holes form a defect class not typically seen in optical lithography, and their frequency must be very low; Peter De Bisschop's 2018 analysis in the Journal of Micro/Nanolithography, MEMS, and MOEMS is the standard treatment of these printing failures.[7](https://irds.ieee.org/images/files/pdf/2024/2024IRDS_LITHO.pdf) • [24](https://doi.org/10.1117/1.jmm.17.4.041011) Resist performance is captured by the Z-factor, \\( \\mathrm{CD^{3} \\cdot LWR^{2} \\cdot DTS} \\), which co-optimizes critical dimension, line-width roughness, and dose-to-size across chemically amplified, multi-trigger, and metal-organic resists; dense sub-10 nm patterning still requires alternative resist materials.[6](https://www.jstage.jst.go.jp/article/photopolymer/38/4/38_263/_pdf) • [12](https://pmc.ncbi.nlm.nih.gov/articles/PMC12943502/) IRDS requirements set line-edge roughness at 0.1 times the minimum half-pitch, so 6 nm features would need LER below 0.6 nm.[5](https://proceedings.spiedigitallibrary.org/journals/journal-of-micro-nanopatterning-materials-and-metrology/volume-24/issue-1/011005/Challenges-and-limits-to-patterning-using-extreme-ultraviolet-lithography/10.1117/1.JMM.24.1.011005.full)\n\nThroughput is limited by available source power and system uptime, while yield suffers from mask and pellicle defects and stochastic resist effects.[12](https://pmc.ncbi.nlm.nih.gov/articles/PMC12943502/) Source power has climbed from 250 W (125 wafers per hour) to 500 W (220 wafers per hour), with 740 W demonstrated and a 2 kW source projected.[8](https://www.asml.com/en/company/stories/2022/making-euv-lab-to-fab) • [6](https://www.jstage.jst.go.jp/article/photopolymer/38/4/38_263/_pdf) • [19](https://euvlitho.com/2024/S1.pdf) On masks, a low-n absorber shows roughly 2 to 3 times higher sensitivity to mask-making errors, requiring tighter absorber-height and CD control.[25](https://euvlitho.com/2023/P1.pdf) At aggressive optics the depth of focus collapses: at NA 0.77 and \\( k_{1} = 0.3 \\), resolution would be about 5.3 nm but Rayleigh depth-of-focus only ±11 nm.[5](https://proceedings.spiedigitallibrary.org/journals/journal-of-micro-nanopatterning-materials-and-metrology/volume-24/issue-1/011005/Challenges-and-limits-to-patterning-using-extreme-ultraviolet-lithography/10.1117/1.JMM.24.1.011005.full) High NA's anamorphic optics cut the field to 26 mm × 16.5 mm, so Intel deliberately selected Panther Lake layers with no electrical connections crossing the half-field boundary, and its 2D \"Zipzag\" stitching approach still had pending electrical test results as of September 2026.[11](https://www.eetimes.com/intel-puts-high-na-euv-into-production-but-stitching-still-has-something-to-prove)\n\nX-ray lithography is predominantly cost- and infrastructure-limited, depending on sources, beamlines, and mask fabrication, and serial e-beam writing is too slow for wafer production.[12](https://pmc.ncbi.nlm.nih.gov/articles/PMC12943502/) EUV single patterning will not completely replace multiple patterning; ArF immersion multiple patterning continues to be used depending on level-specific details, yield, and cost.[7](https://irds.ieee.org/images/files/pdf/2024/2024IRDS_LITHO.pdf) NIL is receiving attention for selected levels such as SADP loop cuts or DRAM word line cuts, but does not yet match EUV in defectivity and overlay.[7](https://irds.ieee.org/images/files/pdf/2024/2024IRDS_LITHO.pdf) The IRDS 2024 chapter also notes there is not yet a demonstrated method for the 7 nm half-pitches projected in the later years of the roadmap.[7](https://irds.ieee.org/images/files/pdf/2024/2024IRDS_LITHO.pdf)\n\n## References\n\n1. [Advancements in Lithography Techniques and Emerging Molecular Strategies for Nanostructure Fabrication](https://pmc.ncbi.nlm.nih.gov/articles/PMC11988993/)\n2. [Extreme ultraviolet lithography (Nature Reviews Methods Primers, 2024)](https://www.nature.com/articles/s43586-024-00361-z)\n3. [Physics of laser-driven tin plasma sources of EUV radiation for nanolithography](https://iopscience.iop.org/article/10.1088/1361-6595/ab3302/meta)\n4. [Interface formation and optical design of EUV reflective multilayer mirrors](https://iopscience.iop.org/article/10.35848/1347-4065/ae4686)\n5. [Challenges and limits to patterning using extreme ultraviolet lithography (SPIE JM3)](https://proceedings.spiedigitallibrary.org/journals/journal-of-micro-nanopatterning-materials-and-metrology/volume-24/issue-1/011005/Challenges-and-limits-to-patterning-using-extreme-ultraviolet-lithography/10.1117/1.JMM.24.1.011005.full)\n6. [EUV lithography development at ASML (Journal of Photopolymer Science and Technology)](https://www.jstage.jst.go.jp/article/photopolymer/38/4/38_263/_pdf)\n7. [International Roadmap for Devices and Systems (IRDS) 2024, Lithography chapter](https://irds.ieee.org/images/files/pdf/2024/2024IRDS_LITHO.pdf)\n8. [Making EUV: from lab to fab (ASML)](https://www.asml.com/en/company/stories/2022/making-euv-lab-to-fab)\n9. [Canon FPA-1200NZ2C nanoimprint lithography equipment](https://global.canon/en/product/indtech/semicon/fpa1200nz2c.html)\n10. [Tracing the Emergence of Extreme Ultraviolet Lithography (CSET)](https://cset.georgetown.edu/wp-content/uploads/CSET-Tracing-the-Emergence-of-Extreme-Ultraviolet-Lithography.pdf)\n11. [Intel Puts High-NA EUV into Production, but Stitching Still Has Something to Prove (EE Times)](https://www.eetimes.com/intel-puts-high-na-euv-into-production-but-stitching-still-has-something-to-prove)\n12. [The Evolution of Lithography: From Resolution Scaling to Manufacturing Constraints](https://pmc.ncbi.nlm.nih.gov/articles/PMC12943502/)\n13. [Hiroo Kinoshita (2005). History of extreme ultraviolet lithography. Journal of Vacuum Science & Technology B Microelectronics and Nanometer Structures Processing Measurement and Phenomena.](https://doi.org/10.1116/1.2127950)\n14. [Jan van Schoot and colleagues (2017). High-numerical aperture extreme ultraviolet scanner for 8-nm lithography and beyond. Journal of Micro/Nanolithography MEMS and MOEMS.](https://doi.org/10.1117/1.jmm.16.4.041010)\n15. [SCALPEL: Projection Electron Beam Lithography (1999 Particle Accelerator Conference)](https://proceedings.jacow.org/p99/PAPERS/FRBL1.PDF)\n16. [MAPPER: High throughput Maskless Lithography (CEA-Leti workshop presentation)](https://www.cea.fr/cea-tech/leti/english/Documents/Spie-Litho/03%20-%20ML2%20-%20MAPPER%20-%20M%20Wieland%20-%20LETI%20WS%20SPIE%202018.pdf)\n17. [Multi-beam mask writing opens up new fields of application, including curvilinear mask pattern for high-NA EUV lithography (SPIE JMM)](https://www.spiedigitallibrary.org/journals/journal-of-micro-nanopatterning-materials-and-metrology/volume-23/issue-1/011205/Multi-beam-mask-writing-opens-up-new-fields-of-application/10.1117/1.JMM.23.1.011205.pdf)\n18. [Stephen Y. Chou and colleagues (1997). Sub-10 nm imprint lithography and applications. Journal of Vacuum Science & Technology B Microelectronics and Nanometer Structures Processing Measurement and Phenomena.](https://doi.org/10.1116/1.589752)\n19. [0.55 NA EUV lithography: Imaging & Overlay (ASML/Zeiss SMT, EUVL Symposium 2024)](https://euvlitho.com/2024/S1.pdf)\n20. [High NA EUV reaches new readiness milestone with first high-volume Logic product (ASML via GlobeNewswire, July 15, 2026)](https://www.globenewswire.com/news-release/2026/07/15/3327453/0/en/High-NA-EUV-reaches-new-readiness-milestone-with-first-high-volume-Logic-product.html)\n21. [Intel Foundry and ASML Accelerate Industry Readiness for High-NA EUV](https://www.intel.com/content/www/us/en/newsroom/news/intel-foundry/intel-foundry-asml-accelerate-industry-readiness-for-high-na-euv.html)\n22. [TSMC and ASML Announce Initiative to Pioneer Industry Transition to Large-Format Photomasks for High NA EUV (ASML press release, September 7, 2026)](https://www.asml.com/en/news/press-releases/2026/tsmc-and-asml-announce-industry-transition-to-large-format-photomasks-for-high-na-euv)\n23. [Iason Giannopoulos and colleagues (2024). Extreme ultraviolet lithography reaches 5 nm resolution. Nanoscale.](https://doi.org/10.1039/d4nr01332h)\n24. [Peter De Bisschop (2018). Stochastic printing failures in extreme ultraviolet lithography. Journal of Micro/Nanolithography MEMS and MOEMS.](https://doi.org/10.1117/1.jmm.17.4.041011)\n25. [The High NA EUV exposure tool: Nearing completion and next steps (EUVL Symposium 2023)](https://euvlitho.com/2023/P1.pdf)\n\n---\n*Topic: Encyclopedia › Technology and the built world › Engineering and manufacturing › Manufacturing processes and fabrication*\n\n*Initially written Sep 29, 2026 · Edited: Oct 15, 2026*\n\n*Copyright 2026 EdgeChat AI, a subsidiary of Biostate AI.*\n\nLicense: Edgepedia Community License 1.0, https://www.edgepedia.org/edgepedia/license\n", "same_as": [], "url": "https://www.edgepedia.org/next-generation-lithography", "markdown_url": "https://www.edgepedia.org/next-generation-lithography.md", "license": { "name": "Edgepedia Community License 1.0", "url": "https://www.edgepedia.org/edgepedia/license", "summary": "Free with credit, commercial use included. AI training is open to everyone. For other uses, organizations over USD 100M in revenue or 100M monthly users license separately.", "spdx": "LicenseRef-Edgepedia-Community-1.0" }, "credit": "\"Next-generation lithography\", Edgepedia (EdgeChat), https://www.edgepedia.org/next-generation-lithography. Edgepedia Community License 1.0.", "credit_md": "\"[Next-generation lithography](https://www.edgepedia.org/next-generation-lithography)\", Edgepedia (EdgeChat), [https://www.edgepedia.org/next-generation-lithography](https://www.edgepedia.org/next-generation-lithography). [Edgepedia Community License 1.0](https://www.edgepedia.org/edgepedia/license).", "credit_html": "\"Next-generation lithography\", Edgepedia (EdgeChat), https://www.edgepedia.org/next-generation-lithography. Edgepedia Community License 1.0.", "speakable": "Next-generation lithography is the family of patterning technologies developed to succeed optical lithography in making nanoscale chips; EUV lithography at 13.5 nm is the adopted leading-edge technique." }