# ASML NXE

The **ASML NXE** is a family of extreme ultraviolet (EUV) lithography systems built by ASML on the [TWINSCAN](https://www.edgepedia.org/twinscan) platform, used in high-volume manufacturing of advanced logic and memory chips. NXE systems are the first production machines to use a 13.5 nm EUV light source and operate at a numerical aperture (NA) of 0.33, printing microchip features with a resolution of 13 nm, which deep ultraviolet (DUV) lithography cannot reach.<sup>[1](https://www.asml.com/en/products/euv-lithography-systems)</sup> Chipmakers use them to print the highly complex foundation layers of their 7 nm, 5 nm, and 3 nm nodes, and the latest generation supports 2 nm logic and leading-edge DRAM.<sup>[1](https://www.asml.com/en/products/euv-lithography-systems)</sup>

| Key fact | Detail |
|---|---|
| Light and optics | 13.5 nm EUV light from a tin-based plasma source; reflective projection optics with NA 0.33; resolution 13 nm; 300 mm wafers with a maximum exposure field of 26 mm x 33 mm<sup>[2](https://www.asml.com/en/products/euv-lithography-systems/twinscan-nxe-3600d)</sup> |
| Throughput | NXE:3600D: 160 wafers per hour at a 30 mJ/cm² dose; NXE:3800E: 220 wafers per hour, a 38% productivity gain<sup>[3](https://www.sec.gov/Archives/edgar/data/937966/000093796624000026/exhibit994.htm)</sup> |
| Overlay | NXE:3600D product overlay ≤ 1.7 nm and matched overlay ≤ 1.1 nm; NXE:3800E ≤ 1.5 nm and ≤ 0.9 nm<sup>[3](https://www.sec.gov/Archives/edgar/data/937966/000093796624000026/exhibit994.htm)</sup> |
| First shipments | NXE:3100 pre-production system shipped in 2010 to a Samsung research facility in South Korea; first production system, the NXE:3300, shipped in 2013<sup>[4](https://www.asml.com/en/company/stories/2022/making-euv-lab-to-fab)</sup> |
| Development cost | More than €6 billion invested in EUV R&D over 17 years; light-source specialist Cymer acquired in 2013<sup>[1](https://www.asml.com/en/products/euv-lithography-systems)</sup> |
| Customer funding | In 2012, Intel, Samsung, and TSMC committed €1.38 billion of R&D funding through the Customer Co-Investment Program and took minority stakes in ASML<sup>[4](https://www.asml.com/en/company/stories/2022/making-euv-lab-to-fab)</sup> |
| Price | An NXE:3800E low-NA EUV scanner costs around $235 million<sup>[5](https://www.tomshardware.com/tech-industry/semiconductors/american-startup-substrate-promises-2nm-class-chipmaking-with-particle-accelerators-at-a-tenth-of-the-cost-of-euv-x-ray-lithography-system-has-potential-to-surpass-asmls-euv-scanners)</sup> |

## How an NXE system works

The NXE platform exposes 300 mm wafers with 13.5 nm EUV light generated by a tin-based plasma source. To make that light, a CO₂ laser fires two separate laser pulses at a fast-moving drop of tin, vaporizing it and creating EUV light, up to 50,000 times per second.<sup>[1](https://www.asml.com/en/products/euv-lithography-systems)</sup>

Because EUV light is absorbed by everything, including air, the whole light path from source to wafer must sit in high vacuum. Instead of lenses, the optical column uses several [multilayer mirrors](https://www.edgepedia.org/multilayer-mirror) to guide the EUV light to the wafer, shrinking the reticle pattern by a factor of four; the reticle itself is a multilayer reflector that uses interference to reflect light from the chip pattern.<sup>[1](https://www.asml.com/en/products/euv-lithography-systems)</sup>

Precision mechanics handle the wafers inside this environment. Robot arms transfer wafers in and out of the vacuum through an air lock, operating within a positioning accuracy of 25 µm and holding a uniform surface temperature within 2 mK. The wafer stage positions the wafer to within a quarter of a nanometer for each exposure, checking and adjusting 20,000 times per second.<sup>[1](https://www.asml.com/en/products/euv-lithography-systems)</sup>

The TWINSCAN layout raises throughput: the system measures wafer characteristics at the metrology position while another just-measured wafer is being exposed, and in-situ measurements with per-wafer correction of optics and stages optimize imaging and overlay for each exposed wafer.<sup>[2](https://www.asml.com/en/products/euv-lithography-systems/twinscan-nxe-3600d)</sup>

## Generations

ASML shipped the first TWINSCAN NXE:3100, a pre-production EUV system, in 2010 to a Samsung research facility in South Korea, where it achieved first light on [Christmas Eve](https://www.edgepedia.org/christmas-eve). Six more systems went to customers in Asia and the US, and in 2013 ASML shipped the first EUV production system, the TWINSCAN NXE:3300.<sup>[4](https://www.asml.com/en/company/stories/2022/making-euv-lab-to-fab)</sup> EUV turned a corner in 2016, when customers began ordering the NXE:3400 in higher numbers; at the beginning of 2020 ASML celebrated its 100th EUV system shipment.<sup>[1](https://www.asml.com/en/products/euv-lithography-systems)</sup>

The current lineup spans three 0.33 NA generations: the NXE:3400C supports volume production at the 7 and 5 nm nodes, the NXE:3600D supports EUV volume production at the 5 and 3 nm logic nodes and leading-edge DRAM nodes, and the NXE:3800E supports high-volume manufacturing of 2 nm logic nodes and leading-edge DRAM nodes.<sup>[1](https://www.asml.com/en/products/euv-lithography-systems)</sup> ASML delivered the first NXE:3800E systems in the first half of 2024.<sup>[6](https://ourbrand.asml.com/m/6da40511fe722a23/original/Statutory-Interim-Report-2024.pdf)</sup>

## Productivity and overlay

Throughput and overlay are the two numbers that determine what an NXE system contributes to a fab. At a 30 mJ/cm² dose, the NXE:3600D is specified at 160 wafers per hour, and the NXE:3800E at 220 wafers per hour, a 38% productivity improvement, with overlay improved by 13% to enable EUV on the 2 nm node.<sup>[3](https://www.sec.gov/Archives/edgar/data/937966/000093796624000026/exhibit994.htm)</sup> The NXE:3600D combines imaging and overlay improvements with a 15% to 20% productivity improvement capability over its predecessor, the NXE:3400C, at the same dose.<sup>[2](https://www.asml.com/en/products/euv-lithography-systems/twinscan-nxe-3600d)</sup>

**Where the gains come from.** The NXE:3800E pairs a 500 W EUV source operating at a higher tin droplet frequency and a new tin management architecture with a faster, double-slotted load lock and wafer handler, higher-acceleration wafer stages, projection optics optimized for stability at higher power, and a reticle clamp rated for higher powers; some modules are shared with the High NA EXE platform.<sup>[3](https://www.sec.gov/Archives/edgar/data/937966/000093796624000026/exhibit994.htm)</sup> In factory qualifications, the NXE:3800E reached dedicated-chuck overlay of 0.6 nm at 220 wafers per hour against a 0.8 nm spec, and matched-machine overlay populations at 195 wafers per hour for the NXE:3400C, NXE:3600D, and NXE:3800E show the successive spec tightening from 1.5 nm to 1.1 nm to 0.9 nm.<sup>[3](https://www.sec.gov/Archives/edgar/data/937966/000093796624000026/exhibit994.htm)</sup> By 2026, ASML reported record NXE throughput of 230 wafers per hour on the continued performance increases of the NXE:3800E.<sup>[7](https://ourbrand.asml.com/asset/d5e933d7-78d0-406c-aed7-a46626e63381/2026_-AGM-_presentation.pdf)</sup>

## Roadmap and High NA

ASML's roadmap extends the 0.33 NA line beyond the NXE:3800E. The NXE:4000F is specified at 250 wafers per hour or more with matched-machine overlay of 0.8 nm or better, using a 600 W source, EXE wafer-stage technology, and a 25% increase in reticle-stage acceleration, enabling 0.33 NA EUV on the 1.4 nm node; a further NXE:4200G is charted at 280 wafers per hour or more.<sup>[3](https://www.sec.gov/Archives/edgar/data/937966/000093796624000026/exhibit994.htm)</sup> Beyond that, ASML has said it is on track to release an NXE system with a 1000 W EUV source processing up to 330 wafers per hour, projected for 2030 or beyond.<sup>[8](https://www.tomshardware.com/tech-industry/semiconductors/asml-makes-breakthrough-in-euv-chipmaking-tech-plans-to-increase-speed-by-50-percent-by-2030-new-1-000-watt-light-source-fires-three-lasers-at-100-000-tin-droplets-every-second)</sup>

The NXE line's successor platform is the **EXE** family, known as High NA, which raises the numerical aperture from 0.33 to 0.55 with a novel optics design and significantly faster wafer and reticle stages, printing with a resolution of 8 nm. The first [High NA EUV](https://www.edgepedia.org/high-na-euv) system was delivered in December 2023, with high-volume manufacturing expected in 2025–2026.<sup>[1](https://www.asml.com/en/products/euv-lithography-systems)</sup> The two platforms coexist in customer roadmaps: TSMC, for example, has announced plans to begin using High NA EUV in 2030, meaning NXE-class low-NA tools remain the production workhorse for current and near-term nodes.<sup>[9](https://www.tomshardware.com/tech-industry/semiconductors/tsmc-to-start-using-high-na-euv-lithography-in-2030-a10-or-a11-technology-prime-candidates-for-use)</sup>

## Development history

EUV lithography was explored from the 1980s, and work to industrialize it began in 1994, when a coalition of semiconductor companies including ASML delivered the first prototype. In August 2006 ASML shipped the world's first EUV demo tool to the College of Nanoscale Science & Engineering in [Albany, New York](https://www.edgepedia.org/albany-new-york), and to imec in Leuven, Belgium; in the spring of 2008 that tool produced the world's first full-field EUV test chips.<sup>[1](https://www.asml.com/en/products/euv-lithography-systems)</sup> ASML formed the European EUCLIDES consortium with ZEISS and [Oxford Instruments](https://www.edgepedia.org/oxford-instruments) in 1998, joined forces with the American EUV LLC in 1999, and brought in Jos Benschop in 1997 to lead its EUV program.<sup>[4](https://www.asml.com/en/company/stories/2022/making-euv-lab-to-fab)</sup>

The light source was the hardest problem. ASML had collaborated with several potential source suppliers, including San Diego-based Cymer, chose Cymer's laser-produced plasma approach, and acquired the company in 2013 after the R&D proved much harder than anticipated.<sup>[4](https://www.asml.com/en/company/stories/2022/making-euv-lab-to-fab)</sup> In total, ASML invested more than €6 billion in EUV R&D over 17 years.<sup>[1](https://www.asml.com/en/products/euv-lithography-systems)</sup> Customer money carried part of the load: in 2012 Intel, Samsung, and TSMC committed €1.38 billion of R&D funding over five years under the Customer Co-Investment Program, acquiring minority stakes in return, with Intel alone committing €829 million alongside an investment of up to 15% of ASML.<sup>[4](https://www.asml.com/en/company/stories/2022/making-euv-lab-to-fab)</sup><sup> • </sup><sup>[10](https://moneyweek.com/investments/tech-stocks/how-dutch-start-up-asml-rose-to-rule-the-world)</sup> Even after the first shipments, it took nine years before customers began releasing products containing EUV technology, as chipmakers matured the resist, mask, and design infrastructure around the new wavelength.<sup>[4](https://www.asml.com/en/company/stories/2022/making-euv-lab-to-fab)</sup>

## References

1. [EUV lithography systems – Products, ASML](https://www.asml.com/en/products/euv-lithography-systems)
2. [TWINSCAN NXE:3600D – EUV lithography systems, ASML](https://www.asml.com/en/products/euv-lithography-systems/twinscan-nxe-3600d)
3. [ASML Investor Day exhibit, SEC EDGAR (November 14, 2024)](https://www.sec.gov/Archives/edgar/data/937966/000093796624000026/exhibit994.htm)
4. [Making EUV: from lab to fab, ASML Stories (2022)](https://www.asml.com/en/company/stories/2022/making-euv-lab-to-fab)
5. [American startup Substrate promises 2nm-class chipmaking with particle accelerators, Tom's Hardware](https://www.tomshardware.com/tech-industry/semiconductors/american-startup-substrate-promises-2nm-class-chipmaking-with-particle-accelerators-at-a-tenth-of-the-cost-of-euv-x-ray-lithography-system-has-potential-to-surpass-asmls-euv-scanners)
6. [ASML Statutory Interim Report 2024](https://ourbrand.asml.com/m/6da40511fe722a23/original/Statutory-Interim-Report-2024.pdf)
7. [ASML 2026 Annual General Meeting presentation](https://ourbrand.asml.com/asset/d5e933d7-78d0-406c-aed7-a46626e63381/2026_-AGM-_presentation.pdf)
8. [ASML makes breakthrough in EUV chipmaking tech, plans to increase speed by 50% by 2030, Tom's Hardware](https://www.tomshardware.com/tech-industry/semiconductors/asml-makes-breakthrough-in-euv-chipmaking-tech-plans-to-increase-speed-by-50-percent-by-2030-new-1-000-watt-light-source-fires-three-lasers-at-100-000-tin-droplets-every-second)
9. [TSMC to start using High-NA EUV lithography in 2030, Tom's Hardware](https://www.tomshardware.com/tech-industry/semiconductors/tsmc-to-start-using-high-na-euv-lithography-in-2030-a10-or-a11-technology-prime-candidates-for-use)
10. [How Dutch start-up ASML rose to rule the world, MoneyWeek](https://moneyweek.com/investments/tech-stocks/how-dutch-start-up-asml-rose-to-rule-the-world)

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*Topic: Encyclopedia › Technology and the built world › Engineering and manufacturing › Manufacturing processes and fabrication › Semiconductor manufacturing equipment*

*Initially written Oct 15, 2026*

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License: Edgepedia Community License 1.0, https://www.edgepedia.org/edgepedia/license
