# Eric Pop
**Eric Pop** is an electrical engineer who works on energy-efficient nanoelectronics, with courtesy appointments in Materials Science & Engineering and in Applied Physics at Stanford and SLAC.[1](https://profiles.stanford.edu/epop) He is known for research on carbon nanotube, graphene, and other two-dimensional-material electronics, and for phase-change memory devices that switch with very low current.[1](https://profiles.stanford.edu/epop) He was elected a Fellow of the [American Physical Society](https://www.edgepedia.org/american-physical-society) in 2022 and a Fellow of IEEE in 2021.[1](https://profiles.stanford.edu/epop)
| Key facts | |
|---|---|
| Current position | Pease-Ye Professor of Electrical Engineering, Stanford, since 2023[2](https://poplab.stanford.edu/pdfs/EricPop_CV_Feb2026.pdf) |
| Field | Semiconductor devices and energy-efficient nanoelectronics[1](https://profiles.stanford.edu/epop) |
| Training | Stanford PhD in Electrical Engineering, 2005[2](https://poplab.stanford.edu/pdfs/EricPop_CV_Feb2026.pdf) |
| Doctoral co-advisors | Kenneth E. Goodson (Mechanical Engineering) and Robert W. Dutton (Electrical Engineering), Stanford[3](https://poplab.stanford.edu/pdfs/EricPop-PhDthesis.pdf) |
| Signature work | Monolayer transition-metal-dichalcogenide nanoribbon transistors scaled to 25–30 nm channels, *Nature Nanotechnology*, 2026[4](https://www.nature.com/articles/s41565-026-02161-w) |
| Fellows | |
## Education and early career
He then moved to Stanford for doctoral study. His dissertation, *Self-Heating and Scaling of Thin Body Transistors*, was submitted to Stanford's Department of Electrical Engineering in December 2004, and the degree was conferred in 2005.[2](https://poplab.stanford.edu/pdfs/EricPop_CV_Feb2026.pdf) • [3](https://poplab.stanford.edu/pdfs/EricPop-PhDthesis.pdf) The project was co-supervised by Kenneth E. Goodson, of Mechanical Engineering, and [Robert W. Dutton](https://www.edgepedia.org/robert-w-dutton), of Electrical Engineering.[3](https://poplab.stanford.edu/pdfs/EricPop-PhDthesis.pdf)
After the PhD he worked as a Senior Engineer at Intel while also serving as a visiting researcher at Stanford from 2005 to 2007.[2](https://poplab.stanford.edu/pdfs/EricPop_CV_Feb2026.pdf) His Stanford profile also lists industrial experience at IBM alongside Intel.[1](https://profiles.stanford.edu/epop)
## Career at Illinois and Stanford
His other Stanford roles are Professor of Materials Science & Engineering by courtesy since 2019, Professor of Applied Physics by courtesy since 2024, Senior Fellow at the Precourt Institute for Energy since 2024, and faculty co-lead of the SystemX Alliance.[1](https://profiles.stanford.edu/epop) • [2](https://poplab.stanford.edu/pdfs/EricPop_CV_Feb2026.pdf)
The Pop Lab, working in the Stanford Nanofabrication Facility and Stanford Nano Shared Facilities, researches energy-efficient transistors, memory, and integrated circuits; nanomaterials including graphene, boron nitride, MoS2, carbon nanotubes, and GeSbTe; the fundamental physical limits of current and heat flow, such as ballistic electrons and phonons; and thermoelectrics.[1](https://profiles.stanford.edu/epop) • [5](https://biox.stanford.edu/people/eric-pop) • [6](https://postdocs.stanford.edu/prism/potential-mentors-prism-candidates/eric-pop)
## Representative work
A 2026 *Nature Nanotechnology* paper reports monolayer transition-metal-dichalcogenide nanoribbon transistors, fabricated by a top-down multipatterning process with anchored contacts to limit nanoribbon delamination, with both n- and p-type operation.[4](https://www.nature.com/articles/s41565-026-02161-w) The devices reach channel lengths and widths down to 25–30 nm with minimal edge degradation, confirmed by tip-enhanced photoluminescence.[4](https://www.nature.com/articles/s41565-026-02161-w) Integrated with thin high-κ gate dielectrics, they deliver on-state currents up to 560, 420, and 130 µA/µm at 1 V drain-to-source voltage for n-type MoS2, n-type WS2, and p-type WSe2 respectively; the WS2 result exceeds prior single-gated 2D-semiconductor nanoribbon reports by more than two orders of magnitude, even in normally off (enhancement-mode) operation.[4](https://www.nature.com/articles/s41565-026-02161-w)
The laboratory's broader record spans the same materials and themes. In 2021 a *Science* paper demonstrated multilevel phase-change memory on a flexible substrate with ultralow switching current density.[1](https://profiles.stanford.edu/epop) In January 2025 a *Science* paper reported ultrathin noncrystalline NbP semimetal films thinner than 5 nm, in which the room-temperature resistivity, about 34 µΩ·cm for a 1.5-nm-thick film, is up to six times lower than that of the team's bulk NbP films and lower than conventional metals (roughly 100 µΩ·cm) at similar thickness.[1](https://profiles.stanford.edu/epop) • [7](https://ee.stanford.edu/surface-conduction-and-reduced-electrical-resistivity-ultrathin-noncrystalline-nbp-semimetal)
## Honors and recognition
Pop was named a Presidential Early Career Award for Scientists and Engineers (PECASE) recipient, an honor the White House gives to early-career scientists and engineers, and has received Young Investigator Awards from the [Office of Naval Research](https://www.edgepedia.org/office-of-naval-research), the Air Force Office of Scientific Research, NSF (CAREER), and DARPA, as well as the Intel Outstanding Researcher Award.[1](https://profiles.stanford.edu/epop) • [5](https://biox.stanford.edu/people/eric-pop) He was elected an IEEE Fellow in 2021 and an APS Fellow in 2022.[1](https://profiles.stanford.edu/epop) • [2](https://poplab.stanford.edu/pdfs/EricPop_CV_Feb2026.pdf) He has chaired the IEEE Device Research Conference and the IEEE Non-Volatile Memory Technology Symposium, and has served on program committees of APS, MRS, IEDM, and VLSI conferences.[1](https://profiles.stanford.edu/epop)
## References
1. [Eric Pop's Profile | Stanford Profiles](https://profiles.stanford.edu/epop)
2. [Eric Pop CV (February 2026)](https://poplab.stanford.edu/pdfs/EricPop_CV_Feb2026.pdf)
3. [Self-Heating and Scaling of Thin Body Transistors (PhD dissertation, Stanford University, December 2004)](https://poplab.stanford.edu/pdfs/EricPop-PhDthesis.pdf)
4. [Scaling nanoribbon transistors with monolayer transition metal dichalcogenides | Nature Nanotechnology](https://www.nature.com/articles/s41565-026-02161-w)
5. [Eric Pop | Stanford Bio-X](https://biox.stanford.edu/people/eric-pop)
6. [Eric Pop | Office of Postdoctoral Affairs](https://postdocs.stanford.edu/prism/potential-mentors-prism-candidates/eric-pop)
7. [Surface conduction and reduced electrical resistivity in ultrathin noncrystalline NbP semimetal | Stanford Electrical Engineering](https://ee.stanford.edu/surface-conduction-and-reduced-electrical-resistivity-ultrathin-noncrystalline-nbp-semimetal)
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*Topic: Encyclopedia › Technology and the built world › Engineers and computer scientists › Engineers and materials scientists › Researchers in electrical engineering, semiconductors, communications, and signal processing › MEMS, sensors, and nanoelectronics*
*Initially written Sep 21, 2026 · Reviewed: Sep 25, 2026 · Edited: Sep 25, 2026; Oct 15, 2026 · Last review: Sep 25, 2026*
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