410 articles
First Draft of a Report on the EDVAC
The First Draft of a Report on the EDVAC is a 1945 report by John von Neumann giving the first published description of a stored-program computer.
FLAGS register
The FLAGS register, extended as EFLAGS and RFLAGS, is the x86 status register holding single-bit arithmetic results and system flags controlling interrupts, I/O privilege, and processor modes.
Floating-point unit
A floating-point unit (FPU) is the part of a processor that performs arithmetic on real numbers, found in microcontrollers, phone and PC processors, and modern GPUs.
Forwarding (CPU pipelining)
Forwarding, also called bypassing, is a pipelined-processor technique that routes an instruction's result directly from a pipeline register to a dependent instruction, resolving most RAW data hazards without stalling.
Fugaku (富岳) (supercomputer)
Fugaku (富岳) is a Japanese supercomputer in Kobe, jointly developed by RIKEN and Fujitsu as the successor to the K computer and TOP500 leader from June 2020 to June 2022.
Fujitsu A64FX
The Fujitsu A64FX is a 64-bit Arm microprocessor designed by Fujitsu with RIKEN, best known as the processor of the supercomputer Fugaku and the first CPU to adopt SVE.
Functional coverage
Functional coverage is a user-defined metric in hardware verification that measures how much of a design's specification has been exercised during simulation, unlike automatically extracted code coverage.
Globally asynchronous, locally synchronous
Globally asynchronous, locally synchronous (GALS) is a digital design style, introduced by Chapiro in 1984, where each chip block runs on its own clock and communicates asynchronously.
Google Axion
Google Axion is Google's first custom Arm-based data center CPU, announced in April 2024, with up to 72 Neoverse V2 cores powering Google Cloud's C4A virtual machines.
Google Tensor
Google Tensor is a series of mobile system-on-chip processors designed by Google for its Pixel smartphones, debuting in 2021 with the Pixel 6 and focusing on on-device AI and computational photography.
Granite Rapids
Granite Rapids is the code name for Intel's Xeon 6 P-core processors, built on Redwood Cove cores and launched as the Xeon 6900P series in September 2024.
Graphics Core Next
Graphics Core Next (GCN) is a GPU instruction set architecture and microarchitecture family developed by AMD, introduced in 2011 with the Radeon HD 7000 series and ending with Vega.
Halt and Catch Fire (computing)
Halt and Catch Fire (HCF) is a joke mnemonic for a machine instruction that halts a processor beyond normal recovery, first printed in a 1967 Datamation humor piece.
Hardware acceleration
Hardware acceleration is the use of dedicated hardware, such as GPUs, FPGAs, or TPUs, rather than general-purpose CPU execution, to perform specific computations faster or more efficiently.
Hardware register
A hardware register is a small, named storage location inside a processor or digital device, holding bits the hardware reads or writes in a single cycle.
Hardware virtualization
Hardware virtualization: CPU/ISA features (Intel VT-x, AMD-V, ARM Virtualization Extensions) supporting fully virtualized machines via root/non-root modes, VMCS/VMCB, EPT/NPT, and IOMMU; from IBM System/370 (1972) to x86 extensions (2005-2008).
Harvard architecture
The Harvard architecture is a computer architecture holding instructions and data in separate memories with separate buses, allowing parallel access and contrasting with the von Neumann design.
Haswell (microarchitecture)
Haswell, or Intel Haswell, is Intel's fourth-generation Core microarchitecture, launched in 2013, the successor to Ivy Bridge and the basis for Core i7, i5, and i3 processors.
Hazard (computer architecture)
A hazard, or pipeline hazard, is a condition in a pipelined processor that prevents the next instruction from executing on schedule, resolved by stalls, forwarding, or prediction.
Heterogeneous computing
Heterogeneous computing combines different processor types, typically a CPU with GPUs, FPGAs, or ASICs, in one system so each runs the workloads it handles best.
Horizon Robotics (地平线机器人)
Horizon Robotics (地平线机器人) is a Chinese supplier of energy-efficient computing platforms and software for ADAS and automated driving, founded by Yu Kai in Beijing in 2015 and best known for its Journey automotive chips.
Hygon Information Technology (海光信息技术股份有限公司)
Hygon Information Technology (海光) is a Chinese fabless semiconductor company founded in Tianjin in 2014 from a 2016 AMD licensing agreement, now a principal domestic supplier of x86 server CPUs and AI accelerators.
Hyper-threading
Hyper-Threading Technology, announced by Intel in 2001, is its implementation of simultaneous multithreading, letting one physical CPU core execute two code streams at once as two logical processors.
I/O channel
An I/O channel is a programmable input-output processor in IBM architecture that executes channel programs to move data between peripherals and main memory, freeing the CPU.
I386
I386 is the common name for the Intel 80386, a 32-bit microprocessor introduced in 1985, the first 32-bit chip in Intel's PC line and the origin of IA-32.
I486
The I486 is a 32-bit x86 microprocessor family Intel introduced in 1989, the first x86 chip with over a million transistors, serving as Intel's desktop processor until the 1993 Pentium.
IA-32
IA-32, also known as x86-32, is the 32-bit instruction set architecture Intel introduced with the 80386 in 1985, defining the x86 family's 32-bit programming model.
IA-64
IA-64, also known as the Intel Itanium architecture, is a 64-bit instruction set developed by Intel and Hewlett-Packard, launched in the Itanium processor in 2001.
IBM 704
The IBM 704 was a large-scale vacuum-tube scientific computer announced by IBM in 1954, the first mass-produced computer to combine magnetic-core memory with floating-point arithmetic.
IBM 7090
The IBM 7090 was a transistorized scientific mainframe IBM first delivered in November 1959, keeping the 709's 36-bit architecture while running about six times faster.